SECTION 1 :
When it comes to RAM OCing we mainly concerned with :
- RAM Clock Frequencies ,
- RAM Timings/Latencies ,
- FSB : DRAM ratio ,
- SPD Chip ,
- and Voltage.
DDR(1/2/3) RAM modules have 3 types of ‘clocks’ associated with them:
- The first is DRAM Core clock or memory Clock.
- The second comes I/O Bus clock.
- Finally the 3rd is the Effective Data Rate.
The prime difference between DDR1 and DDR2 is that DDR2 can run its I/O bus clock twice the memory clock but with higher latencies and DDR2 has prefetch size of 4 bits as opposed to DDR1’s 2 bits.
And the the main difference between DDR2 and DDR3 is that DDR3 can run its I/O bus clock at four times the memory clock but with higher latencies and DDR3’s prefetch buffer is 8 bits deep.
For DDR2 :
- I/O Bus = DRAM Core Clock x 2
- Data Rate = I/O Bus frequency x 2 (i.e ‘DDR’)
- Data Rate = 4(bits per clock) x I/O Bus Rate [4n prefetch]
For DDR3 :
- I/O Bus = DRAM Core Clock x 4
- Data Rate = I/O Bus frequency x 2 (i.e ‘DDR’)
- Data Rate = 8(bits per clock) x I/O Bus Rate [8n prefetch]
Here Onwards Whenever I Refer ‘Base Clock’ or ‘I/O Bus Clock’ Or ‘DRAM Frequency’ ALL MEAN THE SAME.
For DDR(1\2\3)-SD-RAM the data rate is twice the base clock rate.
For e.g. RAM running at DRAM Frequecy (Base Clock) of 400 Mhz has an effective (data rate) Frequency of 800 Mhz.
Limits for DDR2 and DDR3 :
- For DDR2 RAM modules the official max frequency is 1066 Mhz (Jedec) while it can reach to 1200 Mhz when overclocked.
- For DDR3 RAM modules the official max frequency is 1600 Mhz (Jedec) but can reach to overwhelming 2500Mhz – that’s insanely insane …I mean thats the frequency at which CPU’s operate.
Before going further into details I’d like you to have a look on the screen shot that I have taken on my PC for explanation so that you can understand better ; that’s what I hope!
Screenshot 1: Showing the SPD chip readings and memory details.
Screenshot 2: Showing the ‘current’ RAM timings , frequency and FSB : RAM ratio.
SECTION 2 : Ram Timings
When it comes to Overclocking RAM we are just concerned with 4(out of many) timings as seen in screenshot 2. The chips used on the DDR ram modules have 4 different types of timings which give us a sense of the speed of ram along with its stability and rated frequency ofcourse. When it comes to overclocking loosening the timings is very effective for increasing the RAM frequency making the modules stable at high frequencies and on the contrary reducing the RAM frequency the timings can be tightened (lowered). But ironically lowering the timings decreases access time but at the cost of the bandwidth.
Now lets get a feel of some of the Signals(strobes) for RAM:
- /CAS[Active low] :- Column access strobe(signal) When this signal goes low , the column in the selected row is ready to be accessed in burst mode of 2 , 4 or 8.
- /RAS[Active low] : – Row access strobe(signal)
- Precharge : – Used to activate/deactivate a row in the selected bank before it can be used for read/write operation.
These timings are specified are in the following order : tCL-tRCD-tRP-tRAS and as you have guessed ‘t’ stands time.
NOTE : All latencies are in terms of clock cycles and actually derived from the current bus speed which is in nanoseconds.For e.g. CAS latency(which is explained below) in nano seconds from clock cycles can be found as follows:
CAS Latency in ns = CAS delay in cycles x time taken for 1 cycle
But time period is inverse of frequency.Hence we get,
CAS Latency in ns = CAS Latency in cycles x [Bus Frequency] –1
CAS LAtency in ns = CAS Latency in cycle / Bus Frequency
The 4 important timings w.r.t RAM Overclocking are :
- t-CL : [CAS Latency] It is time elapsed between the memory controller sending the address of the column and the data that “first “arrives in response.Since data is sequentially placed in memory and a row contains sequential data so its quite simple to catch the fact that columns will be switched more frequently than rows so CAS will have a big impact on performance. Though some say that CL is not that important … but generally it is and its only in the case of bizzare memory access patterns that CL may become less significant.
Typical t-CL Values in clock cycles :
- DDR1 – 2,3
- DDR2 – 4 to 6
- DDR3 – 6 to 10
- t-RCD : [RAS to CAS Delay]It is the amount of delay between a RAS and a CAS.=or= Simply speaking it is the time taken to select a particular row first and then selecting the particluar column for data access. It doesn’t have a huge impact on performance.
Typical t-RCD Values in clock cycles :
- DDR1 – 2 to 4
- DDR2 – 3 to 5
- DDR3 – 6 to 10
- t-RP : [RAS Precharge Time]It is the time required to deactivate the current row and activate next row.=or= Simply delay caused by switching between rows.
Typical t-RP Values in clock cycles :
- DDR1 – 2 to 4
- DDR2 – 3 to 5
- DDR3 – 6 to 10
- t-RAS : [Active to Precharge Delay / Row Active Time]Time required between an active and a precharge command.
The time taken between 2 memory access / Data requests.
The time taken to activate a memory bank(row) and then deactivating it. It affects stability more than performance. It is approximately equal to tCL + rRCD + tRP [=>tRAS] while in some cases it may not be so. And heres a quote from a wiki article – “in practice for DDR RAM Modules , it should be set to at least tRCD + tCAS + 2 to allow enough time for data to get streamed out”
Typical t-RAS values in cycles :
- DDR1 – 5 to 12
- DDR2 – 10 to 19
- DDR3 – 15 to 30
SECTION 3 : FSB:DRAM Ratio
Now , while talking about FSB : RAM ratio we are concerned with the base FSB frequency and the DRAM frequency (base clock rate).This ratio tells us “who is running faster than whom” and when DRAM frequency is more than base FSB or both are the same then we won’t have any issues with system performance. Depending on both the frequencies FSB : RAM can yield any one of the 2 operating modes which are Synchronous and Asynchronous.
Synchronous Mode: (sync)
- In sync mode both the frequencies are equal which means that both the RAM and FSB are running synchronously and yields max performance.
Asynchronous Mode: (async)
- Note that Async mode can give either max performance or average performance as follows:
- If the FSB frequency is more than DRAM frequency then u’ll get average or poor performance because FSB(hence CPU) is running faster than RAM and so RAM cannot cope with data hungry CPU’s requests and eventually CPU has wait i.e be in a idle state for a while till the data arrives from RAM.
- If the DRAM frequency is more or equal to FSB clock speed then u’ll get max performance since here CPU doesn’t have be idle in between and also DRAM being faster than FSB is not a concern since CPU will read/write data at FSB’s rate.
Common FSB ratios :
- 3:4 -> For each 4 DRAM ticks , FSB ticks at rate of 3
- 2:3 -> FSB is at 266 Mhz and DRAM is at 400 Mhz
- 1:1 -> Both are equal for e.g both running …at say 266 Mhz
- 5:4 -> You can guess this!
SECTION 4 : Ram Voltages
This is the last thing you wanna mess with , after it being configured according to the EPP or XMP profile. Generally voltage increase must be limited to 8% to 10% of the max supported voltage according to EPP or XMP Profile and you must make sure that the chips on the RAM modues supports this level of voltage increment else you will end up damaging it. For DDR2 for Mobos which support Core2 architecture 2.1/2.2/2.3 V is safest maximum but this doesn’t mean all RAMs have this as their max safe limit. The safest max voltage depends on the chips used by the manufacturer. For DDR2 generally the default is 1.8V while for DDR3 its 1.5V . It again majorly depends on the chips used for the modules. But i’d say never-ever do this until you have enough experience and know about various chips. Instead set the RAM’s voltage according to EPP/XMP profile if not set.
Visit the below link to know more about the chips on your RAM module and how much far you can push them.
Link : http://ramlist.i4memory.com/ddr2/
Standard JEDEC & Oveclocked Voltages :
- For DDR1 – Jedec = 2.5V | OC = 3.2v Max
- For DDR2 – Jedec = 1.8V | OC = 2.3V Max , 1.8V~2.2V is ‘just safe’ for 24/7
- Finally for DDR3 – Jedec = 1.5V | OC = 2.1V Max , 1.5~2.0V is ‘just safe’for 24/7 while on some systems 1.65V+ may be fatal (old corei7 LGA1366 systems).
SECTION 5 : A Word On SPD
SPDis the acronym for Serial Presence Detect. SPD chips are now commonly found on the SDRAM DIMM Modules. Its job is to store the RAM settings for different frequency and voltages. SPD makes it easier for bios to configure the RAM for the system. Apart from the JEDEC standard profiles SPD also contains EPP or XMP profiles. EPP is Enhanced Performance Profile which can be read by some Nvidia and AMD chipsets and configures the RAM according to it. If not supported then BIOS just loads the default configuration. EPP is present on RAM modules which are market as “SLI ready” or “Crossfire ready” which just a marketing thing then any thing else. If the Motherboard cannot read EPP it does not mean that the RAM cannot be configured as per the EPP. In this case we just have to configure it manually which i’ll talk about in upcoming post. XMP is Intel’s substitute for XMP which is short for eXtreme Memory Profile. XMP is supported by intel chipsets like X48 , X58 , etc… . The use of EPP/XMP is just to get the RAM self configured for max performance rather then manually doing it from BIOS – if the motherboard supports it. Screenshot-1 shows SPD profiles of my RAM which is – 2 modules of Corsair CM2X2048-6400C4DHX. My mobo is Asus P5Q Deluxe and my mobo cannot read EPP so i have to manually set it for max performance while playing games like Crysis at max settings.
SECTION 6 : How do we do it?
After getting equipped with the knowledge presented above its time to do some RAM Overclocking which is straight forward.
- 1 ) First go on increasing the frequency in small increments of 20Mhz – 30Mhz from the rated frequency Initially.
- 1.1 ) If u want sync mode then do the necessary increments for FSB or leave it if u wanna go with async mode.
- 2 ) Now run all the necessary stability tests.
- 3 ) If tests are successful repeat step 1.
- 4 ) If test fail or system crashes during gameplay even after successful test then loosen the timings.
- 5 ) Now start again from step 2.
- 5.1 ) Some where here u must get a stable overclock.
- 6 ) If u want more OC then if system crashes after step 5 its time to increase voltage.
- 7 ) Increment voltage in steps of 0.05v or 0.02v [BEWARE].
- 7.1 ) You can stop after step 7 or proceed further for some more insanity.
- 8 ) Now repeat from step 2 =or= step 1 but with increments of 5Mhz to 7Mhz.
- 9 ) After this u would have pushed ur RAM to its limits and a little more OCing would seriously damage your RAM.
RAM stability test and info softwares :
- CPUZ – Gives you all your hardware info | Link : http://cpuid.org
- Prime95 – for benchmarking stability test | Link : http://mersenne.org
- Super PI – Stability and stress tool | Link : http://
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